Repeating circuit interrupters having sequence coordination



May 9, 1967 c. GlLKER 3,319,125

REPEATING CIRCUIT INTERRUPTERS HAVING SEQUENCE COORDINATION Filed Sept. 9, 1964 2 Sheets-Sheet 1 C. lGILKER May 9, 1967 REPEATING CIRCUIT INTERRUPTERS HAVING SEQUENCE COORDINATION 2 Sheets-Sheet Filed Sept. 9, 1964 (E KQ United States Patent O 3,319,125 REPEATING CIRCUIT INTERRUPTERS HAVING SEQUENCE COORDINATIN Clyde Gillrer, South Milwaukee, Wis., assigner to Mc- Graw-Edison Company, Milwaukee, Wis., a corporation of Delaware Filed Sept. 9, 1964, Ser. No. 395,241 9 Claims. (Cl. 317-22) This invention relates to repeating circuit interrupters and, more particularly, to new and improved means for coordinating repeating circuit interrupters where a plurality are employed in the same system.

A repeating circuit interruptor or recloser, may be characterized as a cirucit protective device having condition sensing means connected to the system being protected and which is responsive to abnormal circuit conditions to initiate a switch opening operation, opening time delay means, switch reclosing means operable after each opening operation, and operation counting and lockout means which is operable to initiate time delayed switch opening after a first predetermined number of operations and to prevent reclosing after a second predetermined number of operations.

Because the majority of faults in electrical supply and transmission systems are temporary in nature, and will clear in a relatively short time, it is common to arrange the switch opening means of the repeating circuit interrupters protecting such systems to execute a series of rapid opening operations so that the period during which the system remains energized is shorter than the time necessary for backup protective devices, such as fuses, to operate. In addition, the circuit interrupter contacts must not be closed immediately in order to allow these fuses time to cool. `If the fault does not clear during this initial series of rapid operations, the time delay means is actuated by the operation counting means so that there follows a second series of operations in which the reclosers contacts remain closed for a period of sufficient length to allow the backup protective devices to operate. If the fault still has not cleared after a predetermined number of Such time delayed operations, it is considered permanent and the operating counting means prevents the actuation of the reclosing means so that the recloser is locked open.

When a plurality of repeating circuit interrupters are employed in the same system, they are arranged so that the device furthest from the source of power has the shortest opening times. As a result, the remote recloser will interrupt the fault prior to the actuation of the proximate recloser so that service to the intervening portions of the system may be maintained.

As stated hereinabove, each of the circuit interrupters will execute a series of rapid opening operations followed by a second series of opening operations which are time delayed. Because the time delayed operations of the remote circuit interrupter will generally be slower than the rapid operations of the proximate circuit interrupter, means m-ust be provided to prevent the proximate circuit interrupter from operating after the remote circuit interrupter has executed its series of rapid operations and switches to time delayed operations.

It is an object of the invention to provide means for preventing a proximate circuit interrupter from executing a rapid opening operation after a coordinated remote circuit interrupter has executed a series of rapid operations and has switches to time delayed operations.

Another object of the invention is to provide a repeating circuit interrupter having step acting operation counting means which are advanced upon the occurrence of fault current.

It is a more specific object of the invention to provide a repeating circuit interruptor having abnormal condirice tion sensing means operable to produce an electrical signal upon the appearance of an abnormal circuit condition, switch opening means responsive to the signal to initiate a switch opening operation, electroresponsive sequencing means operable to successive ones of a plurality of stages to modify the opening time delay of the switch opening operations, energy storage means, circuit means for providing a charging current to t-he energy storage means upon the occurrence of the electrical signals and bi-stable switching circuit which is rendered operative by the How of charging current to the energy storage means to com-plete an energizing circuit to 4the sequencing means.

These and other objects and advantages of the instant invention will become more apparent from the detailed description threof taken with the accompanying drawings" wherein:

FIG. l schematically illustrates a repeating circuit interrupter incorporating the instant invention; and

FIG. 2 more specifically illustrates a portion of the repeating circuit interrupter shown in FIG. 1.

Referring now to the drawings in greater detail, FIG. l shows a repeating circuit interrupter, or recloser, having main interrupting switches 10, an overload responsive circuit 12, switch opening means 14, switch closing means 16 and sequencing means 17. In general terms, the overload responsive circuit 12 is operable to actuate the switch opening means 14 upon the occurrence of an overload in the system being protected so that the interrupting switches 10 will each `be moved to their open positions. Upon this event, the reclosing means 16 is made operable to return the interrupting switches 10` to their closed position. A Sequencing means 17 performs the operation counting and lockout functions and includes a stepping relay coil 18 and step switches 134, 146, 146', 147 and 167.

For a more complete description of the circuit breaker operating mechanism usable with the illustrated control mechanism, reference is made to copending application S.N. 56,259 tiled Sept. 15, 1960, and assigned to the assignee of the instant invention.

The overload responsive circuit 12 is coupled into each phase A, B and C of the polyphase system being protected and includes a phase overcurrent sensing circuit portion 26, a phase timing circuit portion 27 and a phase output circuit portion 28. In addition, a ground fault 4responsive circuit 12 is provided and includes a fault sensing circuit portion 26 coupled to each of the phases A, B and C and a ground timing circuit portion 27' coupled to the ground fault sensing circuit portion 26 and to the phase output circuit portion 28.

The overcurrent responsive circuit 12 and the ground fault responsive circuit 12 will be discussed in greater detail below, it being suiiicient at this point to state that when a predetermined current is sensed by the overcurrent circuit 26 or a predetermined unbalanced current is sensed by the ground fault sensing circuit 26', a signal is provided to their respective timing circuits 27 or 27. Upon the receipt of this signal, the timing circuits 27 or 27 initiate a timing operation and, after a predetermined interval, provide a signal to the output circuit 28, which initiates an opening operation of the interrupting switches 10 by closing normally open contacts 43.

The switch opening means 14 is shown in FG. 1 t-o include an electromagnetic tripper 3i) having a plunger 32 and a coil 36. The plunger 32 is mechanically coupled to a latch crank 33 which is normally urged clockwise about pivot 34 by a reset spring 35 to hold the main switches 10 in closed position against opening spring 69. The coil 36 is connected by a conductor 37 to the negative power supply bus 40 and by a conductor 42 to the contacts 43. A conductor 44 connects the other side of contacts 43 to the positive bus 46 through the step switch 134, which is initially on contact a.

When contacts 43 are closed, upon the occurrence of an abnormal circuit conditionfcoil 36 is energized to rotate crank 33 counterclockwise and release the main switches for movement toward their open position by opening spring 69. When the main switches 10 open, contacts 43 are returned to the-ir normal open position to de-energize coil 36 so that crank 33 is returned to its initial position by reset spring 35i. The trip portion 14 is thereby reset in a position to relatch the main switches 10 when they are returned to their closed position.

Before the continuing of the discussion of the mechanical portion of the device, the operation of the sequencing means 17 will be mentioned briefly. While sequencing means 17 is schematically .illustrated to include a stepping relay coil 18 and step switches 134, 146, 146', 147 and 167, any well-known type of mechanical or static stepping device may be employed. The sequencing means 17 has a plurality ofsequentially operable stages symbolized by the coil 18, a movable wiper and taps a-f for each of the step switches. Each time coil 18 is energized, it is operable to simultaneously advance each Wiper one tap from a to f and back to a. While it may appear from the schematically illustrated step switches that the circuit through each will be momentarily opened when their respective wipers are between positions, in actual practice the switches are of a type wherein the wiper bridges over to the next contact before moving ott the previous one, so that circuit integrity is maintained. For this reason, contacts 171 `are provided in the relay coil 18 energizing circuit and are arranged to open and reclose each time coil 18 advances the step switches so that coil 18 will be de-energized and drop out in preparation for a succeeding stepping operation. The stepping relay coil 18 is connected by conductors 37, 38, 42 and 45 in parallel with the trip coil 36, so that each time the recloser executes an opening operation, the coil 18 will advance each of the switches 134, 146, 146', 147 `and 167.

As seen in FIG. 1, the closing assembly 16 includes a closing coil 120, a time delay relay bank 121 and normally open contacts 122 which are mechanically connected to the -main switches 10. Conductor 124 connects one Side of the closing coil 120 to the negative bus 40 through contacts 122 and conductor 130 connects the other side thereof to the time delay relay bank 121, which, in turn, is connected to the positive bus 46 through switch 147, conductors 47 and 44 and switch 134. When the main switches 10 are in their closed position, contacts 122 are open so that closing coil 120I and the time delay rel-ay bank 121 are de-energized. When the main switches '10 reach their fully open position, the contacts 122 close to complete an energizing circuit through the time delay relay bank 121 causing a predetermined one of the time delay relays in bank 121 to complete `an energizing circuit through the closing coil 120. This moves the magnetic plunger 93 toward the right as viewed in FIG. 1 to close the main switches 10 and extend the opening spring 69, thereby storing energy for a succeeding opening operation. In addition, contacts 122 are opened to de-energize the closing coil 120 and the time delay relay bank 121.

FIG. 2 shows the details of the overload responsive circuit 12 which is connected to phases A, B and C by current transformers 22 and 22 and 22", respectively, Aand corresponding full-wave rectiiiers 24, 24' and 24, whose output terminals are connected in parallel. Resistors 200, 200' and 200 are connected across each of the secondary windings of current transformers 22, 22 and 22"., respectively, so that a voltage will be derived across each resistor which is proportional to` the current of their respective phases and the largest of these drops will appear capacitor 205.

The ground fault circuit 12 is coupled to phases A, B and C by a three-phase current transformer291, which has a resistor 293 connected in its neutral leg so that a voltage drop will appear across resistor 293 which is proportional to the ground fault or unbalance current flowing in the phases A, B and C. Full-wave rectifier 292 couples the resistor 293 to the ground fault sensing circuit 26'.

The timing portion 27 of circuit 12 includes a irst timing circuit 201 connected to the taps a and b of switch 146 and a second timing circuit 201 connected to tap c and d 0f said switch. The timing circuits 201 and 201 are identical except for the size of their components, which determine their time del-ay characteristics, and, accordingly, only timing circuit 201 will be discussed in detail, for the sake ofV brevity. Circuit 201 is shown to include a timing capacitor 202 connected in series with a timing resistor 204 and a diode 206 and the series combination connected in parallel with a second timing resistor 207. As more fully described in copending' application S.N. 800,567, tiled Mar. 19, 1959, and assigned to the assignee of the instant invention, the impedance values of capacitor 202 and resistors 204, 207 determine the charging time for any given fault current. Under normal operating conditions, tap switch 146 will be initially connected to tap a, 'so that timing circuit 201 will govern the first opening operation.

In operation, the current flowing to the collector of a charging transistor 208, which is a function of the voltage across capacitor 205, will split between the parallel paths defined b ythe timing resistor 204 and timing capacitor 202. When there is no overcurrent in any of the phases, capacitor 202 is prevented from charging because it is shunted by a leakage resistor 209 in the overcurrent sens-V ing circuit 26 to which it is connected by diode 210 and conductor 211. As a result of this leakage current, the terminal 228 of resistor 209 has some positive potential.

The current owing through the overcurrent sensing circuit 26 through conductor 212 is also proportional to the highest peak current in any of the phases A, B and C and results in proportional transistor 213 collector current owing through resistors 214 and 216, This produces-a potential on the base of transistor 218 which is also proportional to said peak current. Transistor 218 draws emitter current proportional to this potential through a resistor 220 so that its emitter potential is also proportional to said peak current. The emitter of a signal comparing transistor 222 is held at a fixed potential by a Zener diode 224 and a resistor 226 while its base is connected to the emitter of transistor 218. Thus, by a proper selection of components, transistor 222 can be rendered conductive when the current in any of the phases A, B or C equals or exceeds the desired minimum actuating current of the device.- Upon the occurrence of an overcurrent in the system, therefore, transistor 222 becomes conductive, passing current to the base of output transistor 227. Upon the latter event, transistor 227 will become conductive to connect the leakage resistor 209 to the negative bus 40. This, in turn, causes terminal 228 to assume a negative potential so that leakage current can no longer tiow from capacitor 202. As'a result, the timing capacitor 202 is prevented from discharging through leakage resistor 209 and, therefore, begins charging. In this manner, the timing operation is initiated. Diode 210 performs the function of preventing reverse current iiow from junction point 228 to charging capacitor 202.

As timing capacitor 202 charges up, the potential at the junction point 230 between diode 226 and the base of coupling transistor 231 will begin raising, so that transistor 231 emitter current through resistor 229 will be proportional to the voltage at point 230. As a result, a second transistor 232, whose base is connected to resistor 229, will draw proportional current through resistors 238 and 239 so that the potential of point 233 will also follow the potential of point 230. The base of a signal comparing transistor 234 is connected to point 233 while its emitter is held at a constant potential by a Zener diode 235 and a antenas resistor 236 connected across the power supply buses 4t) and 46.

After timing capacitor 202 has charged for a predetermined time, which is the time delay for the first operation of the device, the potential at point 233 will reach a point where transistor 234 is rendered conductive. Relay 237 will thus be energized to close contacts 43 and thereby initiate an opening operation of the main switches in a manner described above. In addition, stepping relay 18 will also be energized so that step switch 146 will be moved to tap b, so that the time delay circuit 201 will be effective during the second switch opening operation.

Should the fault persist, requiring a third and a fourth opening operation, the switch 147 will be moved to taps c and d, so that the time delay circuit 281' will be effective. The third and fourth operations may then have a longer time delay than the initial operations.

Because the ground fault sensing circuit 26 and the ground timing circuit 27 are identical with the phase overcurrent circuit 26 and the phase timing circuit 27, except for the size of certain components, they will not be discussed in detail, for the sake of brevity. It is suiicient, for an understanding of the invention, to state that when a ground fault occurs in the system, it is sensed by the ground fault sensing circuit 26 in the same manner that an overcurrent is sensed in the phase overcurrent sensing circuit 26. This initiates the charging of the appropriate capacitor in the ground fault timing circuit 27 so that after a time delay the emitter potential of transistor 231 will be suicient to cause the energization of relay 237 in the manner discussed above. Contacts 43 are thereby closed to initiate a switch opening operation.

The time delay relay bank 121 is shown in FIG. l to include three time delay relay means symbolized by coils 121b, 121C and 121d, although it will be appreciated by those skilled in the art that any type of electroresponsive relay may be employed. Each coil 121b, 121C and 1216! is connected between the corresponding taps b, c and d on switch 147 and the negative supply bus 40, and each coil is operative upon being energized, and after a time delay, to close the appropriate contacts 121b, 121C or 121d' to complete the energizing circuit between the closing coil 120 and taps b, c and d of switch 147.

Initially, each of the switches 134, 146, 146 and 147 will be on tap a. When a phase overcurrent or a ground fault or overcurrent is sensed by the abnormal current sensing circuits 26 or 26', trip coil 36 is energized to open the main contacts 10 and stepping relay 18 is energized to move the switches 134, 146, 146 and 147 to their b taps. Movement of switch 147 to its b tap completes an energizing circuit through time delay relay 1Z1b which, after a time delay, closes contacts 121b to energize the closing coil 120 through switches 134, 147, conductors 44, 47, 136, 124 and contacts 122, which are closed when the main switches 10 are open. Should the fault persist, the output portion 28 will again be energized after a short time delay to close contacts 43. This will again energize trip coil 36 and stepping relay 18, so that switches 134, 146, 146 and 147 will each be moved to their taps c, whereupon time delay coil 121C will be energized to close contacts 121C after a time delay, thereby energizing closing coil 120 to initiate a second closing operation. Similarly, should the fault persist after the second reclosing operation, trip coil 36 will be energized after a relatively long time delay to again open the main switches 10. In a like manner, after the third opening operation, stepping relay 18 will move each of the switches 134, 146, 146 and 147 to their d taps, whereupon closing coil 120 will be energized through contacts 121d after a time delay. If the fault continues after the third closing operation, switch 43 will again be closed to energize the trip coil 36 and the stepping relay 18, which will then move each of the switches to their open taps e.

It can be seen that because tap e of switch 134 is opencircuited, closing `coil 120 will remain de-energized,

even though contacts 122 are closed when the main switch 10 is open. As a result, the main switches 10 will not reclose. In this manner, the recloser is locked in open position after a predetermined number of opening and closing operations. Lockout of the recloser after a lesser number of operations, can be accomplished by opening the appropriate one of the switches 148b, 148c and 14861, disposed between the taps of switch 134. For example, if switch 14817 is open, conducto-r 44 and the energizing circuit of the coil will be open-circuited from the positive bus 46 when the stepping switch 134 advances from tap a to tap b. As a result, the recloser will be locked open after a single operation. Similarly, the opening of switch 148C will lock the recloser open after two oper-ations, while the opening of switch 148e' will lock the recloser open after three operations.

Resetting of the recloser vafter it has been locked open in the manner described above is accomplished by means of a manual reset but-ton and stepping switch 167. It will be remembered `that after lockout, each of the step switches 134, 146, 146 and 147 as well as 167 will be connected to t-aps e. When the reset button 165 is closed, stepping relay will be energized from the positive bus 46 to the negative bus 40 through a path defined by t-ap e of step switch 167, conductors 175, 38, 45 and 37. Stepping relay 18 then moves each of the switches to their f taps, whereby an energizing circuit to the stepping relay coil 18 is completed through the tap f of switch 134, conductors 174, 175, 38, 45 and 37. The stepping relay 18 then moves each of the switches to their a taps, whereupon they are in position for a switch closing operation. Diodes 177 and 178 between stepping relay 18 and trip coil 36 prevent energization of the latter during the resetting operation just described.

After the step switches have been cycled to their a taps by reset button 165, t-he main switches 10 may be closed by closing switch 169, whichcompletes energizing circuit to the closing coil 120 around the time delay relay bank 121.

It will be recalled that the recloser will cycle itself to lockout only if the fault current persists after a predetermined number of opening and closing operations. Inl yorder to reset the device should the fault clear after a lesser number of opening and reclosing operations, the time delay reset assembly is provided. This includes a time delay relay coil 186 connected through diodes 186b, 186C and 186d to taps b, c and d of step switch 147 and in parallel with t-he corresponding time Vdelay relay windings 121b, 121C and 12151. Time delay relay winding 186 is operable when energized to close normally open contacts 187 which shunts reset button 165.

Assume, for example, that after a single opening and reclosing operation, the fault clears so that the switch 43 remains open and step switch 18, trip coil 36 and reclosing coil 120 remain de-energized. As a result, each of the step switches will be on their b taps. This will energize the time delay coil 185 .through diode 186. After a time delay, which is longer than t-he combined time delays of relays 121b, 121C and 121d and each of the opening time delay circuits 201 and 201', contacts 187 will close to energize step switch 18 in the same manner as when reset button 165 is closed. Stepping relay 18 will then cycle each of the step switches to their positions a, whereupon time delay relay 185 will be de-energized and contacts 187 will open.

While the resetting time delay relay has been symbolically illustrated as a coil 186 and contacts 187, any well-known type of time delay device may be employed. One example of a time delay circuit which may be employed is illustrated in copending application S.N. 350,- filed March 9, 1964, and assigned to the assignee of the instant invention.

It will be recalled that upon the occur-rence of a fault current in the system A, B, C, transistor 227 in the overcurrent sensing portion 26 will become conductive to connect point 228 to the negative bus 40, whereby capacitor 202 will begin charging. After a predetermined time delay, the charge on capacitor 202 will be suflicient to cause the output circuit 28 to operate whereby contacts 43 are closed and the opening coil 36 is energized to open the main switches and relay coil 18 is energized to a-dvance the wiper of switch 146 to tap b. However, if the fault current is interrupted by another recloser prior toV the time that capacitor 202 is fully charged, transistor 227 and -overcurrent sensing circuit 26 will become non-conductive, thereby isolating junction 228 from the ground bus 40. The partially charged capacitor 202 is thereby allowed to disch-arge and, accordingly, neither the trip coil 36 nor the stepping lrelay 18 is energized.

In order to advance the stepping switches 134, 146, 167, 146' and 147, the sequence coordinating circuit 250 is provided. It will be recalled that sequence coordination is necessary so that when another recloser, which is more remote from the source and which opens the ault, has been advanced to its c and d taps, whereby time delayed epening operation will be initiated, the switch 146 of the instant recloser will not be on taps a and b, whereby it will open after a relatively short time, which may be shorter than the time delayed operation of the remote recloser. If this event were to occur, the instant recloser which is located closer to the source will be caused to operate, thereby interrupting service in a greater portion of the circuit than the location of the fault dictates.

The sequence coordinating circuit 250 includes a first capacitor 251 which is connected by conductor 254 to junction 228 of the phase overcurrent sensing circuit 26 and a second capacitor 252 which is connected by conductor 255 to the junction point 228' of the ground fault sensing circuit 26. Blocking diodes 257 and 258 respectively connect the other terminals of capacitor 251 and 252 to'junction point 259, which is connected by resistor 260 to the positive bus 46. Also connected to the junction point 259 is the base of a NPN type transistor 262 whose collector is connected by resistor 263 to the positive bus 46 through conductor 256 and contacts 253 which are closed when the main switch 10 is closed and whose emit-ter is connected by resistor 265 to one side of the stepping relay 18. The gate elec-trode of a controlled rectifier 266 is also connected to the emitter of transistor 262, while its anode is connected to conductor 256 and its cathode to the one side of coil 18.

It will be recalled that the junction point 228V between the collector of transistor 227 and the resistor 209 in the overcurrent sensing circuit 26 will initially be positive as a result of the drop across resistor 9. Upon the occurrence of a fault, however, transistor 227 becomes conductive to connect junction point 228 to the negative -bus 40, whereby said junction point assumes a negative potential. When the fault current is interrupted by the instant recloser or by a remote recloser, transistor 227 will become nonconductive so that junction point 228 will again have a positive potential.

The changing of junction point 228 from a negative potential to a positive potential will cause charging current to ow to capacitor 251 through resistor 260` and diode 257. The resulting voltage drop across resistor 260 will forward bias transistor 262 so that emitter and collector current Will ow through resistor 265. The resulting drop across resistor 265 will provide sufcient potential on the gate of controlled rectifier 266 to cause said rectifier to become conductive and thereby energize stepping relay coil 18 so that each of the stepping switches will be advanced one tap. Diode 177, however, will prevent trip coil 36 from being energized by the operation of controlled rectifier 266.

The operation of stepping relay 18 will open selfinterrupting contacts 171 so that controlled rectier 266 will become nonconductive and relay coil 18 will drop out. It will be appreciated that if the fault current is interrupted by the instant recloser, the closing of contacts 43 will also close to energize stepping relay 18 and trip coil 36 so that the operation of controlled rectifier 266 will be of no consequence. It can thus be seen that the sequence coordination circuit 250 will cause the stepping relay 18 to advance each of the step switches one position whenever a fault current appears in the system being protected regardless of whether the fault is interrupted by the instant recloser or a remote closer.

The appearance and termination of a ground fault or overcurrent will similarly cause the stepping relay 18 to operate. Thus, upon the appearance of a ground fault current, transistor 227' of the ground fault sensing circuit 26 will become conductive to connect junction 228' to the negative bus 40. When the ground fault cu-rrent disappears upon the operation of the instant or a remote recloser, transistor 227 becomes nonconductive to disconnect junction 228 from the negative bus 40. As a result, charging current will flow from the positive bus through the resistor 260 and diode 258 to capacitor 252, whereupon transistor 262 is rendered 'conductive to initiate the operation of the controlled rectier 266.

While the invention has been shown and described with respect to one particular type of repeating circuit interrupter, it is not intended to be limited thereby but onlyv by the scope of the appended claims.

I claim:

1. A repeating circuit interrupter including main switch means in circuit with an electrical system, abnormal condition sensing means coupled to said system and operable to produce a rst electrical signal upon the occurrence of an abnormal circuit condition and to terminate said first electrical signal upon the disappearance of said abnormal condition, electroresponsive switch opening means, time delay circuit means coupled to said abnormal condition sensing means and responsive to said first signal to energize said switch opening means,v switch closing means, electroresponsive sequencing means in circuit with said switch opening means and having a plu- -rality of stages coupled to said time delay circuit means and being operable to successive ones of said stages each time said switch opening means is energized to modify the opening time delay of said switch opening operations, gating means having an anode-cathode circuit connected to said sequencing means and a gate electrode, first circuit means coupled to said abnormal condition sensing means for producing a second electrical signal upon the` disappearance of said rst electrical signal, second circuit means coupled to said first circuit means and to said gate electrode for renderingsaid gating means conductive upon the occurrence of said second electrical signal, and means associated with said sequencing means for rendering said gating means nonconductive after said sequencing means has operated to a succeeding one of its stages.

2. A repeating circuit interrupter including main switch means in circuit with an electrical system, electroresponsive sequencing means having a plurality of stages and being operable to a Ysuccessive one of said stages upon each switch opening operation, abnormal condition sensing means coupled to said system and operable to produce an electrical signal upon the occurrence of said condition and to terminate said signal upon the disappearance of said condition, switch opening means coupled to said condition sensing means and operative to initiate the opening of said switch means upon the occurrence of said electrical signal, switch closing means, energy sto-rage means coupled to said abnormal condition sensing means for receiving la charging current Vupon the termination of said electrical signal, electronic switching circuit means coupled to said energy storage means and being rendered conductive by t-he flow of charging current to said energy storage means, controlled rectifier means having an anodecathode circuit coupled to said sequencing means and a gate electrode coupled to said electronic switching circuit means, said controlled rectifier means being rendered conductive to complete an energizing circuit through said sequencing means when said electronic circuit means becomes conductive and means associated with said sequencing means for rendering said controlled rectifier means nonconductive after said sequencing means has advanced to a succeeding one of its stages.

3. A repeating circuit interrupter including main switch means in circuit with an electrical system, abnormal condition sensing means coupled to said system and operable to produce an electrical signal upon the occurrence of said condition and to terminate said signal upon the disappearance of said condition, time delayed switch opening means coupled to said condition sensing means and operative to initiate the opening of said switch means upon the occur- :fence of said electrical signal, switch closing means, capacitance means, circuit means coupled to said capacitance means and to said abnormal condition sensing means for providing a charging current to said capacitance upon the termination of said electrical signal, electroresponsive sequencing means having a plurality of stages coupled to said switch opening means and operable to successive ones of said stages upon each switch opening operation to modify the time delay of said switch opening means, electronic switching circuit means coupled to said capacitance means and being rendered conductive by the iiow of charging current to said capacitance means, controlled rectifier means having an anode-cathode circuit coupled to said sequencing means and a gate electrode coupled to said electronic switching circuit means, said controlled rectifier means being rendered conductive to complete an energizing circuit to said sequencing means when said electronic circuit means becomes conductive and means associated with said sequencing means for rendering said controlled rectifier means ncnconductive when said sequencing means advances.

4. A repeating circuit interrupter including main switch means in circuit with an electrical system, abnormal condition sensing means coupled to said system and operable to produce a iirst electrical signal upon the occurrence of a phase overcurrent and a second electrical signal upon the occurrence of a ground fault in said system and to terminate said signal upon the disappearance of said -overcurrent or ground fault, time delayed switch opening means coupled to said condition sensing means and operative to initiate the opening of said switch means upon the occurrence of said first or second electrical signals, switch closing means, first and second capacitance means, circuit means coupled to said first and second capacitance means and to said abnormal condition sensing means for providing a charging current to said rst capacitance means upon the termination of said first electrical signal and a charging current to said second capacitance means upon the termination of said second electrical signal, electroresponsive sequencing means having a plurality of stages coupled to said switch opening means and operable to successive ones of said stages upon each switch opening operation to modify the time delay of said switch opening means, electronic switching circuit means coupled to said capacitance means and being rendered conductive by the ow of charging current to either of said capacitance means, controlled rectifier means having an anode-cathode circuit coupled to said sequencing means and a gate electrode coupled to said electronic switching circuit means, said controlled rectifier means being rendered conductive to complete an energizing circuit to said sequencing means when said electronic circuit means becomes conductive.

5. A repeating circuit interrupter including main swtch means in circuit with an electrical system, an energy source, abnormal condition sensing means coupled to said system and operable to produce an electrical signal upon the appearance of an abnormal condition in said system and to terminate asid signal upon the disappearance of said condition, electroresponsive switch opening means,

switch closing means operable after a switch opening operation, electroresponsive sequencing means in circuit with said switch opening means and having a plurality of stages, time delay circuit means coupled to said abnormal condition sensing means and responsive to said signal `for completing an energizing circuit between said energy source and said switch Iopening means and said sequencing means to open said main switch means and to advance said sequencing means to a succeeding one of its stages, said sequencing means being operable in certain of its successive stages to modify the delay of said time delay circuit means and to initiate switch closing operations, n-ormally inactive electronic switching circuit means in circuit to complete the energizing circuit to said sequencing means independently of said switch opening means, circuit means coupled to said abnormal condition sensing means and to said electronic switching circuit means and responsive solely to the disappearance of said electrical signal to render said electronic switching circuit means active to advance said sequencing means.

6. The repeating circuit interrupter set forth in claim 5 wherein said electronic switching circuit means includes `control terminal means and load terminal means in circuit to complete said independent energizing circuit to said sequencing means, and circuit means coupled to said abnormal condition sensing means for providing a control signal to said control terminal means upon the disappearance of said electrical signal to render said electronic switching circuit means active.

7. A repeating circuit interrupter including main switch means in circuit with an electrical system, abnormal condition sensing means coupled to said system land operative to produce an electrical signal upon the oecu-rrence of an abnormal circuit condition and to terminate said signal upon the disappearance of said condition, electroresponsive switch opening means, time delay circuit means coupled to said abnormal condition sensing means and responsive to said signal to energize said switch opening means, switch closing means, electroresponsive sequencing means in circuit with switch opening means and having a plurality of stages coupled to said time delay circuit means and being operable to successive ones of said stages each time said switch opening means is energized to modify the opening time delay of said switch opening means, gating means having an anode-cathode circuit connected to said sequencing means and a gate electrode, and circuit means coupled to said abnormal condition sensing means and to said gate electrode -for rendering said gating means conductive only upon the disappearance of said signal to advance said sequencing means.

8. The repeating circuit interrupter set forth in claim 7 wherein said gating means comprises controlled rectifier means and including means associated with said sequencing means for interrupting the anode-cathode circuit of said controlled rectifier means after said sequencing means is operated to a succeeding one of its stages.

9. The repeating circuit interrupter set forth in claim 8 wherein said circuit means comprises electronic means coupled to said gate electrode and control circuit means coupled to said abnormal condition sensing means and to said electronic means and operative to render said electronic means operative upon the disappearance of said signal.

References Cited by the Examiner UNITED STATES PATENTS 3,100,854 8/1963 Riebs 317--36 X 3,114,079 12/1963 Sofianek et al 317-36 X 3,144,586 l8/1964 Gambale 317--33 X 3,249,811 5/1966 Price et al. 317-23 X MILTON O. HIRSHFIELD, Primary Examiner.

R. V. LUPO, Assistant Examiner. 

1. A REPEATING CIRCUIT INTERRUPTER INCLUDING MAIN SWITCH MEANS IN CIRCUIT WITH AN ELECTRICAL SYSTEM, ABNORMAL CONDITION SENSING MEANS COUPLED TO SAID SYSTEM AND OPERABLE TO PRODUCE A FIRST ELECTRICAL SIGNAL UPON THE OCCURRENCE OF AN ABNORMAL CIRCUIT CONDITION AND TO TERMINATE SAID FIRST ELECTRICAL SIGNAL UPON THE DISAPPEARANCE OF SAID ABNORMAL CONDITION, ELECTRORESPONSIVE SWITCH OPENING MEANS, TIME DELAY CIRCUIT MEANS COUPLED TO SAID ABNORMAL CONDITION SENSING MEANS AND RESPONSIVE TO SAID FIRST SIGNAL TO ENERGIZE SAID SWITCH OPENING MEANS, SWITCH CLOSING MEANS, ELECTRORESPONSIVE SEQUENCING MEANS IN CIRCUIT WITH SAID SWITCH OPENING MEANS AND HAVING A PLURALITY OF STAGES COUPLED TO SAID TIME DELAY CIRCUIT MEANS AND BEING OPERABLE TO SUCCESSIVE ONES OF SAID STAGES EACH TIME SAID SWITCH OPENING MEANS IS ENERGIZED TO MODIFY THE OPENING TIME DELAY OF SAID SWITCH OPENING OPERATIONS, GATING MEANS HAVING AN ANODE-CATHODE CIRCUIT CONNECTED TO SAID SEQUENCING MEANS AND A GATE ELECTRODE, FIRST CIRCUIT MEANS COUPLED TO SAID ABNORMAL CONDITION SENSING MEANS FOR PRODUCING A SECOND ELECTRICAL SIGNAL UPON THE DISAPPEARANCE OF SAID FIRST ELECTRICAL SIGNAL, SECOND CIRCUIT MEANS COUPLED TO SAID FIRST CIRCUIT MEANS AND TO SAID GATE ELECTRODE FOR RENDERING SAID GATING MEANS CONDUCTIVE UPON THE OCCURRENCE OF SAID SECOND ELECTRICAL SIGNAL, AND MEANS ASSOCIATED WITH SAID SEQUENCING MEANS FOR RENDERING SAID GATING MEANS NONCONDUCTIVE AFTER SAID SEQUENCING MEANS HAS OPERATED TO A SUCCEEDING ONE OF ITS STAGES. 